1. Field of the Invention
The present invention relates to a method of forming a current mirror circuit that suppresses a deviation in mirror ratio of the current mirror circuit.
2. Description of the Related Art
FIG. 7 is a basic circuit configuration diagram showing a current mirror circuit of a conventional art. As shown in FIG. 7, there is known a current mirror circuit including two p-type MOS transistors 301 and 302. The MOS transistor 301 has a source connected to a current source 303 and has a gate 307 connected to a drain, and a common connecting portion therebetween is grounded. Further, the MOS transistor 302 has a gate 308 connected to the gate of the MOS transistor 301, a source connected to the current source 303, and a drain 304 as an output terminal. Interconnection between terminals is made by a metal line such as a metal interconnect 312 as shown in FIG. 7.
In the current mirror circuit having the above-mentioned configuration, an input current i1 is supplied to the source of the MOS transistor 301 from the current source 303. An output current i2 flowing through the source of the MOS transistor 302 is controlled by a voltage applied to the gate thereof. A ratio i2/i1 (current mirror ratio) between the input current i1 and the output current i2 is determined based on a ratio of transistor size W/L's between the MOS transistor 301 and the MOS transistor 302. In this case, W represents a gate width of a MOS transistor and L represents a gate length of a MOS transistor. For example, when the ratio between the MOS transistor 301 and the MOS transistor 302, which form the current mirror circuit, is 1:100, a current 100 times as much as a current flowing through the MOS transistor 301 flows through the MOS transistor 302 (for example, see JP 2001-175343 A).
However, while the current mirror ratio i2/i1 is determined by the sizes of the MOS transistors, there is a problem in that the current mirror ratio i2/i1 deviates from a desired value in many cases due to process variation and nonuniformity over a surface of a semiconductor substrate. For one reason, there occurs a deviation in threshold voltage caused by charging to the gate during production process (in-process). This is because the potentials of gates of the adjacent MOS transistors forming a current mirror circuit are floating until the gates are connected to each other via a metal interconnect, and because the degree of influence of the charge varies according to gate area.